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ARM 64位架构介绍
ARM 64位架构介绍 ARM架构概况…本文给大家列出了Arm架构的学习大纲、学习方法、自学路线、付费学习路线。有兴趣的可以关注希望对您有帮助。 如果大家有需要的欢迎关注我的CSDN课程https://edu.csdn.net/lecturer/6964
ARM 64位架构介绍
ARM 64位架构介绍 ARM架构概况v8-A及其他架构概况ARM架构扩展到v8-A, v8.1A, v8.2-A等版本v8-A介绍和原理支持v7遗留代码 AArch32和AArch64状态v7指令集变更 废弃新增功能一些新的64位特性也被添加到32位执行中
64位平台架构概述
示例SoC多核处理器互连ACE或CHI 一致性和互连 分布式中断控制器 固件的角色启动
A64指令集架构ISA
整数操作指令集 整数操作内存操作堆栈系统指令 系统控制寄存器与v7支持和协处理器的关系 调用约定内存访问DRAM和设备 排序模型 屏障 dmb, dsb, isb负载-获取和存储-释放领域信号量 缓存管理 浮点先进的SIMD加密 寄存器和指令 异常级别 4个异常级别栈模型处理程序和线程向量表核心实现选择切换AArch32和AArch64状态 异常和中断处理 控制异常和中断的传递综合寄存器切换异常级别从异常中返回 分页 使用页表进行内存管理4K, 16K和64K粒度页大小使用页表实现的特性例如“永不执行”地址空间技巧——不属于地址的一些字段例如标签和指针认证TLB管理
EL2概述
处理器特性适用于虚拟化 使用异常级别内存管理 二级页表内存分区I/O MMU (SMMU) 启动过程中使用EL2进行UEFI执行增加了Secure EL2架构
缓存
硬件缓存一致性软件责任软件中的缓存控制
安全TrustZone
TrustZone功能 安全内存链接到其他架构中的TrustZone32位或64位TrustZone异常级别上的影响和Secure EL2的增加切换TrustZone的位宽动态TrustZone也称为Realms是ARM的机密计算架构的一部分
其他主题
核心电源管理外部电源控制器 电源模式休眠关闭WFI, WFE, SEV 调试硬件和软件调试 调试器虚拟机监控程序操作系统RAS可靠性可用性可维护性启动过程 Introduction to ARM 64-bit Architecture
Introduction to ARM 64-bit Architecture ARM architecture profiles, what is v8-A and the other architecture profilesARM architecture extensions to v8-A, the v8.1A, v8.2-A, etcv8-A introduction and rationaleSupport for v7 legacy code AArch32 and AArch64 statev7 instruction set changes DeprecationAdditional features (some new 64-bit features have also been added to 32-bit execution)
64-bit Platform Architecture Overview
Sample SoCMP CoreInterconnect (ACE or CHI) Coherency and the interconnect Distributed interrupt controller Role of firmwareBooting
A64 ISA (Instruction Set Architecture)
Integer operationsInstruction set Integer operationsMemory operationsStackSystem instructions System control registersRelationship to v7 support and co-processors Calling conventionsMemory access (DRAM and device) Ordering model Barriers dmb, dsb, isbload-acquire and store-releaseDomainsSemaphores Cache management Floating point, advanced SIMD, crypto Registers and instructions Exception levels The 4 exception levelsStack model, handler and threadVector tableCore implementation choicesSwitching AArch32 and AArch64 state Exception and interrupt handling Control of delivery of exceptions and interruptsSyndrome registersSwitching exception levelsReturn from exception Paging Memory management with page tables4K, 16K and 64K granulesPage sizesFeatures achieved with page tables, such as execute neverAddress space trickery – fields in pointers that are not part of the address, such as tags and pointer authenticationTLB management
EL2 Overview
Processor features intended for virtualization Use of exception levelsMemory management Second level page tablesMemory partitioningI/O MMU (SMMU) The use of EL2 for UEFI execution during bootAddition of Secure EL2 to the architecture
Caches
Hardware cache coherencySoftware responsibilitiesCache control in software
Security (TrustZone)
TrustZone functionality Secure memoryLinks to TrustZone in other architectures32-bit or 64-bit TrustZoneImplications on exception levels, and the addition of secure EL2Switching bitness of TrustZoneDynamic TrustZone, also called Realms, part of ARM’s Confidential Compute Architecture
Other Topics
Core power management, external power controller Power modes (dormant, shutdown)WFI, WFE, SEV Debug (hardware and software based debug) Debugger, hypervisor, OSRAS (Reliability, Availability, Serviceability)Boot process 欢迎关注我的CSDN课程https://edu.csdn.net/lecturer/6964
